
“Is the 1.07% figure a real threshold?” It is a finite-size threshold estimate derived
from logical error rates at L = 4, 6, 8 measured on the full custom Stim circuit. The three
pairwise crossings (L = 4 vs L = 6 at 1.109%, L = 4 vs L = 8 at 1.069%, L = 6 vs
L = 8 at 1.024%) give p
surgery
th
= 1.07% ± 0.05%. Shot counts range from 1,000 per point
(low-statistics, low-p rows) to 8,000 per point (near-threshold rows). Extending to L = 10
would tighten the band but is computationally expensive and not performed here. The
threshold is significantly higher than the proxy estimate of 0.5% reported in Section 7.
“Does the surgery preserve the full code distance, not just the Z-side?” Yes.
Theorem 5 gives the Z-distance preservation proof and Theorem 6 gives the X-distance
preservation proof. Both are general in L via the layer decomposition. Computational
sanity checks at L = 4, 6 confirm both Z and X distances equal L after the merge.
“Does the current threshold simulation benchmark the full merge-split gate,
or only the joint parity measurement?” The current simulation measures only the
joint observable Z
A
⊗ Z
B
failure under MWPM decoding, i.e., the parity-measurement
aspect of the surgery. A full logical-channel benchmark (prepare logical inputs, merge,
measure, split, verify remaining logical observables, compute Pauli transfer matrix) is
identified as future work in Section 9.3. This is a real gap that a fully fault-tolerant gate
characterization will need to close.
“Does this beat bivariate bicycle codes?” Not on rate. The sheet code has rate
Θ(1/L
2
), the same scaling as surface code, vanishing as L → ∞. BB codes achieve con-
stant rates and are the right answer when storage of many logical qubits is the dominant
cost. The sheet code targets a different design point: K=4 planar connectivity (matching
existing hardware like Google Willow) with native co-located inter-sheet gates via local
triangle measurements. BB codes require K=6 with modular logical operation protocols
under active architectural development. The two codes are different tools for different
workloads.
“Why claim a ‘niche’ when 3D toric codes also have inter-block structure?”
The full 3D toric code (or full FCC code) at K=6 or K=12 is not surface-code-compatible;
the niche we claim is specifically K=4 planar connectivity, the connectivity envelope of
standard transmon processors. The sheet code is one of few CSS codes that achieves
cross-block gate operations natively while staying within this hardware envelope.
“Is the planar-boundary case verified numerically?” Not yet. The planar treat-
ment in Section 9.2 is analytical: we identify which triangles are interior, how boundary
triangles truncate to weight-2 effective Z-operators, and how a routing protocol through
interior ancillas accommodates boundary-touching logicals. Numerical verification at
L = 4, 6, 8 with explicit rough/smooth boundaries is identified as a future task. The
toric case is what the threshold simulation actually measured.
All computational results in this paper are reproducible. The reference implementation
consists of the following files in the SSMTheory monorepository, each linked directly:
Construction and analysis:
• sheet_code_fcc_lattice.py — FCC lattice construction, stabilizer matrices, tri-
angle enumeration
• sheet_code_gf2.py — GF(2) linear algebra utilities
23