Distance-scaling fault tolerance of the three-sheet multiplexed FCC sheet code at L = 4, 6, 8

Distance-scaling fault tolerance of the three-sheet multiplexed FCC
sheet code at L = 4, 6, 8
Raghu Kulkarni
1
1
SSMTheory Group, IDrive Inc., Calabasas, CA 91302, USA , raghu@idrive.com
Abstract
We provide a circuit-level numerical validation of the three-sheet time-multiplexed FCC
sheet code [
2
], a quantum low-density parity-check (qLDPC) construction with parameters
[[3
L
3
,
6
L, L
]] derived from the three triad sheets of the face-centered cubic lattice. At
L
= 4
the code packs 24 logical qubits into 192 data qubits at distance 4, an encoding rate of 12.5%,
higher than any other published code at this distance. Three independent sheet-codes share
one chip; ancillas are shared, stabilizers are extracted in three sequential rounds, and the
inactive sheets accumulate depolarizing noise during each round at rate 2
p
. We simulate
the full circuit-level memory experiment with explicit CNOT cascades, depolarizing noise on
every gate, and minimum-weight perfect matching decoding via PyMatching [
3
] on Stim’s [
4
]
detector error model. Threshold under the multiplex idle penalty falls between 0.4% and
0.5%, in agreement with [
2
]. Distance scaling is sharp: the per-logical error rate suppresses
by Λ(4
6) = 11
.
2 between consecutive even
L
at
p
= 0
.
001, and Λ(6
8) = 7
.
8. At
L
= 8
the [[1536
,
48
,
8]] code achieves a per-logical error rate of 5
.
9
×
10
5
, more than an order of
magnitude below the physical rate, on a 48-logical-qubit memory. These suppression factors,
measured in simulation deeply sub-threshold, are over five times those recently reported on
noisy hardware [
5
] on a single-logical surface-code memory; an apples-to-apples comparison
at matched operating point requires either future hardware experiments on this code or a
surface-code simulation at the same deeply sub-threshold operating point and is not made
here. The natural hardware target is the
L
= 6 instance: [[648
,
36
,
6]] encodes 36 logical qubits
at distance 6 in 864 physical qubits, fitting Atom Computing’s 1180-qubit Phoenix processor
and exceeding every prior multi-logical hardware demonstration in distance and logical-qubit
count. The
L
= 4 instance overlaps with Atom Computing and Microsoft’s 24-logical [[4
,
2
,
2]]
demonstration [
8
], providing a calibration point at quadrupled distance (
d
= 4 vs
d
= 2) and
full error correction in place of error detection.
Keywords: quantum error correction, qLDPC codes, FCC sheet code, time-multiplexed
measurement, fault-tolerant scaling, neutral-atom quantum computing
1 Introduction
Surface codes [
6
] dominate the quantum-error-correction landscape because they pair a high
circuit-level threshold (
1%) with a planar layout requiring only nearest-neighbor connectivity.
Their cost is rate: a distance-
d
rotated surface code encodes one logical qubit in
2
d
2
physical
qubits, and the qubit overhead per logical scales as
d
2
. Recent qLDPC constructions, notably
IBM’s bivariate-bicycle (BB) family [
7
], demonstrate that this overhead can be reduced; the
[[144
,
12
,
12]] BB code packs 12 logicals at distance 12 into 144 qubits, at the cost of weight-6
stabilizers and a non-planar layout. Google’s Willow processor [
5
] recently demonstrated below-
threshold fault tolerance on the surface code with Λ
2
.
14 across distances 5 through 7, but the
experiment encoded only one logical qubit.
Reference [
2
] introduces the FCC sheet code, an alternative qLDPC construction obtained by
restricting a face-centered cubic stabilizer code [
1
] to a single triad sheet. The single-sheet code
1
has parameters [[
L
3
,
2
L, L
]] with weight-4 stabilizers and per-qubit connectivity
K
= 4, the same
as the surface code. At
L
= 4 the single sheet is [[64
,
8
,
4]]: 8 logicals at distance 4 in 64 qubits, an
encoding rate of 12.5%. Three independent sheets exist on the same FCC lattice, edge-disjoint but
sharing vertex and octahedral-void ancilla positions. Time-multiplexing across the three sheets
gives a combined [[3
L
3
,
6
L, L
]] code on a single chip: 24 logicals at distance 4 in 192 data qubits
at L = 4, with the same 12.5% rate.
This paper provides circuit-level validation of the three-sheet multiplexed configuration at
L
= 4
,
6
,
8. We confirm the parameters of the sheet code at all three lattice sizes, verify the
threshold under both single-sheet and multiplex operation matches the values reported in [
2
], and
measure the suppression factor Λ between consecutive even
L
. The headline result is that the
three-sheet code shows fault-tolerant scaling on a multi-logical memory, with Λ values dramatically
larger than what current hardware demonstrations report, on a code that fits today’s largest
neutral-atom processors.
The rest of the paper is organized as follows. Section 2 recapitulates the sheet-code construction
and the three-sheet time-multiplexing protocol, fixing notation. Section 3 describes the simulation
methods. Section 4 verifies the construction’s algebraic parameters at
L
= 4
,
6
,
8. Section 5
measures the threshold under the multiplex idle model. Section 6 is the central numerical result:
per-logical error-rate scaling and Λ values. Section 7 places the code in the rate–distance landscape.
Section 8 reports hardware feasibility. Section 9 discusses limitations. We do not address the
high-rate base FCC code or its flag-assisted variant, both of which require weight-12 stabilizers
and K = 12 connectivity outside the scope of current hardware.
2 The Three-Sheet Multiplexed FCC Code
2.1 The triad decomposition
The face-centered cubic (FCC) lattice has
K
= 12 nearest-neighbor vectors, partitioning into three
orthogonal triad sheets [1]:
S
xy
: (±1, ±1, 0) S
xz
: (±1, 0, ±1) S
yz
: (0, ±1, ±1)
At even lattice size
L
, each sheet contains exactly
L
3
edges. Every edge of the FCC lattice belongs
to exactly one sheet. Each sheet is therefore an edge-disjoint
K
= 4 sub-lattice on the same set of
FCC vertices and octahedral voids. Figure 1 shows the construction in three views.
2.2 The single-sheet code
Fix one triad sheet
S
. Place a physical qubit on each of the
L
3
edges in
S
. Stabilizers come in
two types, both weight 4 [2]:
Z-stabilizers: for each FCC vertex v, the Z-parity over the 4 sheet-S edges incident to v.
X-stabilizers: for each octahedral void
o
, the X-parity over the 4 sheet-
S
edges of the
surrounding octahedron.
The resulting code has parameters [[
L
3
,
2
L, L
]] at even
L
:
n
=
L
3
physical qubits,
k
= 2
L
logical qubits,
d
=
L
code distance [
2
]. Each layer of fixed sheet-orthogonal coordinate forms an
independent 2D toric code on a rotated square lattice; the sheet is therefore
L
parallel toric layers
stacked along the orthogonal axis.
2
(a) FCC lattice: K = 12 cuboctahedral neighborhood (b) Three triad sheets, 4 edges each
S
xy
: (±1, ± 1, 0)
S
xz
: (±1, 0, ± 1)
S
yz
: (0, ± 1, ± 1)
(c) Single sheet (S
xy
): weight-4 stabilizers
Z-ancilla (FCC vertex)
X-ancilla (oct. void)
Data qubit (sheet edge)
Figure 1: The FCC sheet-code construction. (a) The 12 nearest neighbors of any FCC vertex sit at
the vertices of a cuboctahedron (faint blue surface). (b) These 12 bonds partition into three orthogonal
sheets of four bonds each:
S
xy
(red),
S
xz
(green),
S
y z
(blue). (c) Within one sheet, qubits sit on edges
(yellow squares); Z-stabilizers are the weight-4 vertex parity checks (red ancilla, four incident sheet edges);
X-stabilizers are the weight-4 octahedral-void parity checks (blue ancilla, four sheet edges around the
octahedron). The three-sheet code interleaves three such structures on a single FCC chip with shared
vertex and oct-void ancillas.
2.3 Three-sheet time multiplexing
All three sheets coexist on a single FCC chip: 3
L
3
data qubits partitioned into three edge-disjoint
groups of
L
3
, plus
L
3
/
2 vertex Z-ancillas and
L
3
/
2 octahedral X-ancillas, with each ancilla
physically shared across all three sheets. The total physical-qubit count is therefore 4
L
3
: 256 at
L = 4, 864 at L = 6, and 2048 at L = 8.
Stabilizers are extracted in a three-round cycle: round 1 measures sheet
S
xy
’s stabilizers, round
2 measures
S
xz
’s, round 3 measures
S
yz
’s. From the perspective of any one sheet, two of every
three measurement rounds are idle. If a single round takes time
t
, each sheet’s data qubits sit
idle for 2
t
between consecutive active measurements. This translates to per-round depolarizing
noise at effective rate 2
p
on every data qubit, independent of and additional to the gate-level noise
that occurs during stabilizer extraction [
2
]. In Stim [
4
], the multiplex penalty is implemented by
inserting DEPOLARIZE1(2p) on all data qubits before each round of stabilizer extraction.
The encoded subspace is the direct sum of the three sheets’ code spaces. The combined
parameters are [[3
L
3
,
6
L, L
]] at periodic boundaries, with rate 2
/L
2
. Per-logical performance
under the multiplex penalty is identical for each of the three sheets by symmetry. Writing
p
b
for
the single-sheet block error rate, the three-sheet block error rate is 1
(1
p
b
)
3
: the sheets fail
independently, so for memory experiments alone the three-sheet code is operationally equivalent
to running three [[
L
3
,
2
L, L
]] blocks side by side. We quote the combined [[3
L
3
,
6
L, L
]] parameters
because they reflect the chip-level resource: a single 4
L
3
-qubit FCC processor running one shared
multiplex protocol, with shared ancillas, shared decoder pipeline, and shared classical control. This
framing also previews the natural follow-up: transversal and lattice-surgery operations between
sheets, which will couple the codes non-trivially and require treating the joint Hilbert space as a
single object (Section 9).
3 Methods
All circuits are built and sampled in Stim 1.15 [
4
]. We construct the FCC lattice for each
L
,
identify xy-sheet edges, build vertex-incident weight-4 Z-stabilizers and octahedral-void weight-4
X-stabilizers, and compute the parity-check matrices
H
X
,
H
Z
in
GF
(2). CSS validity (
H
X
H
Z
=
0
mod
2) is checked explicitly. Logical-Z observables are obtained by reducing each kernel-of-
H
X
3
L 1-sheet code 3-sheet code Phys. qubits Rate (3-sheet) CSS
4 [[64, 8, 4]] [[192, 24, 4]] 256 12.5% yes
6 [[216, 12, 6]] [[648, 36, 6]] 864 5.6% yes
8 [[512, 16, 8]] [[1536, 48, 8]] 2048 3.1% yes
Table 1: Sheet code parameters at
L
= 4
,
6
,
8. The physical-qubit column counts data plus shared ancillas
(4
L
3
): 3
L
3
data qubits across three sheets, plus
L
3
/
2 vertex Z-ancillas and
L
3
/
2 octahedral X-ancillas
shared by all three sheets. Encoding rate of the 3-sheet code is 6
L/
3
L
3
= 2
/L
2
. All constructions verified
CSS valid by direct GF(2) computation.
basis element modulo the row span of H
Z
.
The memory experiment circuit consists of
L
rounds of stabilizer extraction followed by a final
destructive measurement of all data qubits in the
Z
basis. Each round of stabilizer extraction
comprises:
1. the multiplex idle penalty: DEPOLARIZE1(2p) on all data qubits;
2.
Z-stabilizer extraction via CNOT cascade (data
ancilla), with
DEPOLARIZE2(p)
after each
CNOT and X_ERROR(p) on ancilla resets and measurements;
3.
X-stabilizer extraction via Hadamard-CNOT-Hadamard (ancilla
data), with the same
noise placement.
Detector annotations are placed on the Z-stabilizer outcomes only (this is a Z-memory ex-
periment, so X-stabilizer outcomes are non-deterministic on the
|
0
n
initial state). First-round
Z-stabilizer detectors are anchored to the deterministic +1 outcome expected on
|
0
n
; subsequent
rounds compare consecutive measurements; final destructive data measurements close out each
Z-stabilizer’s history.
Decoding is performed by minimum-weight perfect matching using PyMatching 2.3 [
3
] on
Stim’s detector error model ([
4
], decompose-errors mode). For each shot, Stim’s compiled detector
sampler produces the detection-event pattern and the actual observable flips; PyMatching predicts
the observable flips from the detection events; a logical error on observable
i
is recorded when
prediction and actual disagree on observable
i
. Block error rate is the fraction of shots with at
least one disagreement; per-logical error rate is the average disagreement rate per observable.
Sample sizes are 30 000 shots per (
p, L
) point at
L
= 4
,
6 and 20 000 shots at
L
= 8. The
complete simulation pipeline FCC lattice construction, parity-check matrix verification, Stim
circuit assembly, sampling, decoding, and aggregation is contained in three Python scripts
linked individually in the Code and Data Availability section.
4 Static Verification of the Construction
Building the sheet code from the FCC lattice at
L
= 4
,
6
,
8 yields the parameters predicted in [
2
].
Stabilizer ranks satisfy
rank
(
H
Z
) =
rank
(
H
X
) = (
L
3
2
L
)
/
2, giving
k
=
L
3
(
L
3
2
L
) = 2
L
per sheet. The three-sheet count k
3
= 6L follows from edge-disjointness. Table 1 summarizes.
5 Threshold Under the Multiplex Idle Model
We first establish the threshold with and without the three-sheet multiplex penalty, to verify that
our circuit-level model agrees with [
2
]’s analytical claims (Section 9.3 of that work). For threshold
determination only, we use Stim’s built-in
surface_code:rotated_memory_z
circuit at distances
4
10
−1
10
0
Physical error rate (%)
10
−4
10
−3
10
−2
10
−1
10
0
Sheet code logical error rate
paper:
0.63%
(a) Single-sheet operation (no idle noise)
L = 3
L = 5
L = 7
L = 9
L = 11
10
−1
10
0
Physical error rate (%)
paper:
0.42%
(b) 3-sheet multiplexing (idle noise = 2p)
L = 3
L = 5
L = 7
L = 9
L = 11
Sheet code threshold: single-sheet vs three-sheet multiplexing
Figure 2: Sheet code threshold with and without the multiplex idle penalty, MWPM decoding via
PyMatching. Each panel shows sheet-code logical error rate (union over
L
layers) vs physical depolarizing
rate at
L
= 3
,
5
,
7
,
9
,
11. (a) Single-sheet operation: curves cross near 0.65–0.7%, consistent with [
2
]’s
analytical threshold of 0.63%. (b) Three-sheet multiplexing with idle decoherence
DEPOLARIZE1(2p)
per
round: curves cross near 0.42–0.45%, in close agreement with [2]’s analytical threshold of 0.42%.
d
= 3
,
5
,
7
,
9
,
11, which is mathematically identical to one layer of the sheet code (per Section 4
of [2], each sheet decomposes into L independent rotated 2D toric layers). The full custom FCC
sheet-code circuit constructed in Section 3 is used for the distance-scaling result in Section 6.
The protocol is identical except for the
before_round_data_depolarization
parameter: 0 for
single-sheet operation, 2p for three-sheet multiplexing.
Figure 2 shows sheet-code logical error rates (computed as 1
(1
p
per-layer
)
L
, the union over
L
independent layers) against physical depolarizing rate, for
L
= 3
,
5
,
7
,
9
,
11. Curves at different
L
cross at the threshold. Single-sheet operation (left) gives a threshold near 0.65–0.7%, slightly
above [
2
]’s claimed 0.63%. Three-sheet multiplexing (right) gives a threshold near 0.42–0.45%, in
close agreement with [
2
]’s claimed 0.42%. The 1.5
×
reduction in threshold under multiplexing
matches the analytical prediction.
6 Sub-Threshold Distance Scaling
The central numerical result of this paper is the sub-threshold per-logical error rate scaling with
L
for the three-sheet multiplexed code. We run the full circuit-level memory experiment at
L
= 4
,
6
,
8
with the multiplex idle penalty applied, sweeping
p
from 10
4
to 5
×
10
3
. Table 2 reports the
per-logical error rate at each (
L, p
); Table 3 reports the corresponding suppression factors Λ.
Figure 3 shows both as a single combined plot.
At
p
= 0
.
001 (current trapped-ion two-qubit-gate-fidelity regime), the per-logical error rate is
5
.
2
×
10
3
at
L
= 4, 4
.
6
×
10
4
at
L
= 6, and 5
.
9
×
10
5
at
L
= 8. The corresponding suppression
factors Λ(4
6) = 11
.
2 and Λ(6
8) = 7
.
8 mean the per-logical error rate drops by roughly an
order of magnitude per increase of two in
L
. The full three-sheet block error rate 1
(1
p
b
)
3
is
approximately 1.6% at L = 6 and 0.3% at L = 8.
The threshold confirmed in Section 5 manifests in the Λ behavior of Table 3: as
p
approaches
0.5%, Λ falls toward 1, and at
p
= 0
.
005 (just above threshold) the suppression has essentially
disappeared. The crossover is sharp, as expected for a code with a well-defined threshold.
5
p L = 4 L = 6 L = 8
0.0001 3.4 × 10
4
2.8 × 10
6
0 / 20 000
0.0003 1.1 × 10
3
2.8 × 10
5
6.3 × 10
6
0.0005 2.3 × 10
3
1.3 × 10
4
1.6 × 10
5
0.001 5.2 × 10
3
4.6 × 10
4
5.9 × 10
5
0.002 1.3 × 10
2
2.8 × 10
3
7.2 × 10
4
0.003 2.5 × 10
2
7.6 × 10
3
2.8 × 10
3
0.005 5.6 × 10
2
3.0 × 10
2
1.9 × 10
2
Table 2: Per-logical error rate at (
L, p
) for the three-sheet multiplexed code under
DEPOLARIZE1(2p)
idle
penalty. 30 000 shots at
L
= 4
,
6 and 20 000 shots at
L
= 8. “0 / 20 000” indicates no errors observed in the
sample.
p Λ(4 6) Λ(6 8)
0.0003 39.0
0.0005 17.1
0.001 11.2 7.8
0.002 4.6 3.9
0.003 3.2 2.7
0.005 1.9 1.6
Table 3: Distance-suppression factor Λ(
L L
+ 2) =
p
per-log
(
L
)
/p
per-log
(
L
+ 2). Em-dashes indicate the
higher-
L
rate fell below the shot floor. The bold row at
p
= 0
.
001 corresponds to currently demonstrated
trapped-ion two-qubit gate fidelities. For comparison, Google’s Willow processor [
5
] reports Λ
2
.
14 on a
single-logical surface code memory.
7 Rate–Distance Landscape at d = 4
At distance 4, the three-sheet multiplexed FCC code occupies a distinguished point in the
rate–distance landscape. Table 4 compares it directly to other published codes at d = 4.
Per-logical, the rotated surface code at
d
= 4 is more reliable: a single [[16
,
1
,
4]] code block has
a per-logical error rate near 5
×
10
4
at
p
= 0
.
001, compared to the three-sheet code’s 5
.
2
×
10
3
.
The factor of
11
×
per-logical advantage to the surface code is partly offset by its 2
×
data-qubit
cost per logical qubit (16 vs 8). The surface code wins on per-logical fidelity at
d
= 4, but the FCC
three-sheet code is more compact in physical-qubit footprint, with the 2
×
rate advantage holding
at all
L
by construction (2
/L
2
for the FCC code vs 1
/L
2
for the surface code). At
L
= 8 the FCC
code’s per-logical error rate is 5
.
9
×
10
5
, small in absolute terms, though the surface code at
the same distance would likely be smaller still. Whether the per-logical gap to surface widens or
narrows with
L
is determined by the relative thresholds, and a direct circuit-level comparison at
matched L is left to future work.
8 Hardware Feasibility (May 2026)
The three-sheet code at
L
= 4 requires 256 physical qubits at
K
= 4 connectivity, with both
fixed-position ions/qubits and the ability to perform CNOT gates between specific neighbor pairs.
Table 5 lists the principal current platforms.
Neutral-atom hardware fits the three-sheet protocol cleanly. Time-multiplexed stabilizer
extraction requires measuring sheets sequentially while idle sheets stay coherent. Optical-tweezer
rearrangement provides reconfigurable connectivity, so the same ancilla qubits can be paired
with different data sets across the three rounds without rewiring the chip. The required
K
= 4
connectivity is native to neutral-atom arrays.
6
10
−4
10
−3
Physical depolarizing error rate, p
10
−6
10
−5
10
−4
10
−3
10
−2
10
−1
Per-logical error rate
3-sheet multiplexed: per-logical scaling with L
L = 4: 3-sheet [[192,24,4]] (12.5%)
L = 6: 3-sheet [[648,36,6]] (5.6%)
L = 8: 3-sheet [[1536,48,8]] (3.1%)
10
−4
10
−3
Physical depolarizing error rate, p
0
5
10
15
20
25
30
35
40
Suppression factor Λ
Distance suppression (multiplex regime)
Λ(4 6)
Λ(6 8)
Willow Λ 2.14
Λ = 1 (no improvement)
FCC three-sheet multiplexed code: distance scaling under multiplex idle noise (2p)
Figure 3: Three-sheet multiplexed FCC code distance scaling. (Left) Per-logical error rate vs physical
depolarizing rate at
L
= 4
,
6
,
8. The three rate values for these codes are 12.5%, 5.6%, 3.1%. (Right)
Distance suppression factor Λ vs
p
. The dashed line at Λ = 2
.
14 marks Google Willow’s published result;
the dotted line at Λ = 1 marks the threshold. Sub-threshold Λ for the three-sheet FCC code at p = 0.001
is over five times Willow’s, on a 24- to 48-logical memory rather than one logical.
Code n k d Rate K p
L
at p = 10
3
Rotated surface 16 1 4 6.3% 4 5 × 10
4
3D toric (cubic) 192 3 4 1.6% 6
BB family (smallest) 6
MB family (smallest)
FCC 3-sheet (this work) 192 24 4 12.5% 4 5.2 × 10
3
Table 4: Rate and per-logical fidelity comparison at distance
d
= 4. The smallest instances of the BB
family are at distance 6 ([[72
,
12
,
6]]) and 12 ([[144
,
12
,
12]]), so no direct
d
= 4 comparison is possible.
MB-family codes also do not have published instances this small. The FCC three-sheet code has 2
×
the
surface code’s encoding rate and roughly 11
×
the surface code’s per-logical error rate at
p
= 10
3
rate
and per-logical fidelity trade against each other; the FCC code wins the first metric, the surface code
wins the second. (We follow [[
n, k, d
]] convention with
n
counting data qubits only, consistent with [
2
]’s
[[
L
3
,
2
L, L
]] notation.)
K
denotes per-qubit connectivity;
K
= 4 matches the surface code and is the
minimum supported by all current quantum hardware.
The natural near-term hardware target is
L
= 6: the [[648
,
36
,
6]] three-sheet code encodes 36
logical qubits at distance 6 in 864 physical qubits, fitting Atom Computing’s 1180-qubit Phoenix
processor. To our knowledge, no hardware demonstration of fault-tolerant memory has yet reached
either 36 logical qubits or distance 6. Willow’s Λ result [
5
] is on a single logical qubit at distance 5
to 7. Atom Computing and Microsoft’s 2024 work [
8
] encoded 24 logical qubits into 48 ytterbium
atoms using the [[4
,
2
,
2]] code on a 256-atom processor, but the [[4
,
2
,
2]] code is distance 2
(error-detecting, not error-correcting). At
L
= 6 the FCC three-sheet code therefore exceeds both
prior results: 1.5
×
more logicals than Atom + Microsoft, three times the distance, and full error
correction.
The
L
= 4 instance ([[192
,
24
,
4]], 256 physical qubits) is best viewed as a calibration step. It
overlaps Atom Computing and Microsoft’s 24-logical demonstration on logical-qubit count and
atom budget, but runs at quadrupled distance with full error correction in place of detection.
Performing
L
= 4 first, then
L
= 6 on the same processor would yield a measurement of the
suppression factor Λ on a multi-logical memory; this has not been reported on any platform.
7
Platform Qubits Modality L = 4 (256q) L = 6 (864q)
IBM Heron r3 156 supercond. no no
IBM Nighthawk 120 supercond. no no
Quantinuum Helios 98 trapped ion no no
Atom Computing Phoenix 1180+ neutral atom yes yes
Pasqal Orion up to 1024 neutral atom yes yes
QuEra Gemini 256 neutral atom borderline no
Table 5: Quantum hardware platforms in production as of May 2026, and their compatibility with the
three-sheet FCC code at
L
= 4 and
L
= 6. Neutral-atom platforms are the only modality with sufficient
qubits for the
L
= 4 instance; Atom Computing’s Phoenix and Pasqal’s Orion can also support
L
= 6 (864
physical qubits).
9 Discussion
Decoder choice. We use minimum-weight perfect matching, which is the standard choice for
surface-code-style codes and is provably near-optimal for codes with weight-4 stabilizers. We
apply MWPM to Stim’s full detector error model rather than decoding each toric layer separately,
but the layer decomposition guarantees that no correlations across layers can be exploited by a
smarter decoder the mathematical equivalence to
L
independent surface codes is exact. A more
sophisticated decoder, e.g., correlated matching across rounds, or a neural-network-based decoder,
could shift the threshold modestly but is unlikely to change the qualitative scaling story.
Noise model. The depolarizing model used here is standard but does not capture leakage,
drift, slow correlated errors during transport (relevant for ions), or 1
/f
noise (relevant for
superconducting). It does, however, capture the dominant single-qubit and two-qubit noise
mechanisms in trapped-ion and neutral-atom systems where leakage is small. The 2
p
idle-noise
factor used for multiplexing is a model assumption from [
2
]; the actual idle-noise rate on neutral-
atom platforms during atom rearrangement and shelving is a subject of separate measurement.
Distance ceiling. We tested up to
L
= 8. Verifying that Λ persists and continues growing
at
L
= 10
,
12 would require simulating circuits with 4 000 to 7 000 physical qubits and the
corresponding decoders, which is computationally feasible but exceeds our run budget here. The
local stabilizer structure does not change with
L
, so the threshold is expected to be invariant in
L
;
what could change is the decoder optimality at very large detector counts.
Logical operations. This paper concerns only the memory experiment. Logical Clifford
operations on the three-sheet code, including transversal CNOTs between sheets, and lattice-
surgery protocols, are not addressed and remain a subject for follow-up work. The encoding
rate advantage measured here is most useful in regimes where many logical qubits are needed
simultaneously, which is precisely where memory and Clifford operations on a multi-logical block
become important.
Comparison to Willow. Our Λ values at
p
= 0
.
001 are measured in simulation, well sub-
threshold for this code (
p
th
0
.
42% under multiplex). Willow’s reported Λ
2
.
14 [
5
] is
hardware-measured, with the surface code operating at physical error rates closer to threshold
and on a single logical qubit. A like-for-like comparison would require either running the FCC
three-sheet code on hardware at the same operating point (deferred to future work, see Section 8)
or running a surface-code memory in simulation at
p
= 0
.
001, which would also yield large Λ. The
numerical result reported here demonstrates that the FCC three-sheet code shows fault-tolerant
scaling on a multi-logical memory in the same regime where surface codes do; it does not establish
that the FCC code is intrinsically “better” than the surface code at fixed operating point.
8
10 Conclusion
The three-sheet multiplexed FCC sheet code [[3
L
3
,
6
L, L
]] shows fault-tolerant scaling under
realistic circuit-level depolarizing noise, with Λ
11 between consecutive even
L
at
p
= 0
.
001.
The
L
= 4 instance encodes 24 logical qubits in 192 data qubits at distance 4 with rate 12.5%, the
highest of any published code at this distance. The construction fits today’s largest neutral-atom
processors, providing a concrete hardware path to a 24-logical-qubit fault-tolerant memory.
The natural near-term hardware target is the
L
= 6 instance: [[648
,
36
,
6]] encodes 36 logical
qubits at distance 6 in 864 physical qubits, fitting Atom Computing’s Phoenix processor and
exceeding published multi-logical hardware demonstrations in both logical-qubit count and code
distance. The
L
= 4 instance is a calibration step. Beyond memory, transversal Clifford operations
on the three-sheet block, and lattice surgery between blocks for non-Clifford operations, are the
natural follow-up topics. Distance scaling at
L
= 10
,
12 in simulation would also extend the Λ
measurement to higher distances and tighten the asymptotic claim.
Acknowledgments
The three-sheet construction is due to [
2
]; the contribution of the present paper is the circuit-
level validation under hardware-realistic noise. The author thanks the Stim and PyMatching
maintainers for the open-source tooling on which this work depends.
Code and Data Availability
The simulation scripts used for this work are released under the MIT license. Direct links:
fcc_code.py
FCC lattice construction, sheet edge enumeration, weight-4 stabilizer
generation, parity-check matrix assembly in GF(2), and CSS validity verification.
verify_construction.py
algebraic verification of the construction parameters
n
,
k
,
rank(H
X
), rank(H
Z
), and CSS validity at L = 4, 6, 8 (reproduces Table 1).
multiplex_threshold.py
threshold sweep at
L
= 3
,
5
,
7
,
9
,
11 with and without the
three-sheet multiplex idle penalty (reproduces Figure 2).
3sheet_distance_scaling.py
the central distance-scaling experiment at
L
= 4
,
6
,
8
with the multiplex idle penalty applied (reproduces Figure 3 and Tables 2 and 3).
surface_code_baseline.py
rotated surface code [[16, 1, 4]] under matched circuit-level
noise, providing the per-logical baseline cited in Section 7 and Table 4.
build_construction_fig.py
reproduces the cuboctahedral / triad-sheet schematic of
Figure 1.
make_figures.py
regenerates all three figures with TrueType-embedded fonts (single
entry point useful for re-rendering all plots in one step).
requirements.txt
pinned dependency versions:
stim>=1.15
,
pymatching>=2.3
,
numpy>=1.24
,
matplotlib>=3.7. Tested under Python 3.10 and 3.11 on Linux.
Each script is self-contained and writes its output figures and tabulated results to disk. Run-time
on a single modern CPU is approximately 1 minute for the threshold sweep, 5 minutes for the
distance-scaling experiment, and a few seconds each for the static-verification and surface-code-
baseline scripts. A tagged release of these files will be archived with a Zenodo DOI prior to
publication.
9
Competing Interests
The author is employed by IDrive Inc. The following U.S. provisional patent applications, all
naming Raghu Kulkarni as inventor and assigned to IDrive Inc., are on file:
No. 64/029,144 (April 3, 2026): “Method and System for Quantum Error Correction Using
Triad Sheet Decomposition of the Face-Centered Cubic Lattice with Weight-4 Stabilizers on
Planar K 4 Quantum Processors.
No. 64/015,757 (March 24, 2026): “Method and System for Tunable-Distance Quantum
Error Correction at 29% Encoding Rate on a Face-Centered Cubic Lattice via Periodic Flag
Parity Measurements at Tetrahedral Voids.
No. 64/014,145 (March 23, 2026): “System and Method for Generating, Scaling, and Decoding
a High-Rate CSS Quantum Error Correction Code on a Face-Centered Cubic Lattice Using
Triadic Orthogonal Calculus.
No. 64/014,153 (March 23, 2026): “Quantum Associative Memory on a Face-Centered Cubic
Error-Correcting Lattice.
No. 64/008,866 (March 18, 2026): “Method of Manufacturing a Quantum Processor with
Face-Centered Cubic Connectivity from Three Stacked Planar Hexagonal Chip Layers.
No. 64/008,236 (March 17, 2026): “Quantum Error Correction System and Method Using
Face-Centered Cubic Lattice Topology with Tetrahedral Defect-Based Logical Qubits and
Passive Peierls Error Suppression.
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10